| Wiegand Interface |
Wiegand Format Wiegand Data Format Standard.From the above diagram you can see that the wiegand format consists of a parity bit, 8-bit facility code, 16-bit user ID, and another parity bit. A parity bit is used as a very simple quality check for the accuracy of the transmitted binary data. In the above example, the leading parity bit (even) is linked to the first 12 data bits. If the 12 data bits result in an odd number, the parity bit is set to one to make the 13-bit total come out even. The final 13 bits are similarly set to an odd total. Wiegand Signaling Standard.For communication with the microcontroller the Wiegand interface uses two wires for carrying the card data to the controller these wires are called as DATA0 & DATA1. Normally both these lines are high i.e. when no data is being sent. A '0' is sent by making DATA0 line LOW & DATA1 line HIGH. Whereas a '1' is sent by making DATA1 line LOW & keeping DATA0 line HIGH. This signal is at TTL level & not an open collector signal so can be directly connected to the Microcontroller. A typical pulse width is 50 µs with an inter-spacing of 1ms but the actual timing values & output circuitry (open collector/TTL) are determined by the card reader manufacturer.
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