74138 3-Line To 8-Line Demultiplexers
- Stock: 20 InStock
- SKU: 0225 | DAA241
-
Rs.
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74138 3-Line To 8-Line Demultiplexers
The LSTTL/MSI SN54/74LS138 is a high speed 1-of-8 Decoder/ Demultiplexer. This device is ideally suited for high speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three LS138 devices or to a 1-of-32 decoder using four LS138s and one inverter. The DM74LS138 decodes one-of-eight lines, based upon the conditions at the three binary select inputs and the three enable inputs. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented with no external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. The DM74LS139 comprises two separate two-line-to-fourline decoders in a single package. The active-low enable input can be used as a data line in demultiplexing application.The LS138 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families.
- Demultiplexing Capability
- Multiple Input Enable for Easy Expansion
- Typical Power Dissipation of 32 mW
- Active Low Mutually Exclusive Outputs
- Input Clamp Diodes Limit High Speed Termination Effects
Features Of 74138 3-Line To 8-Line Demultiplexers
- Designed specifically for high speed:
Memory decoders
Data transmission systems
- DM74LS138 3-to-8-line decoders incorporates 3 enable
inputs to simplify cascading and/or data reception
- Schottky clamped for high performance
- Typical propagation delay (3 levels of logic)
DM74LS138 21 ns
- Typical power dissipation
DM74LS138 32 mW
- Active Low Mutually Exclusive Outputs
- Input Clamp Diodes Limit High Speed Termination Effects
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