74138 3-Line To 8-Line Demultiplexers

74138 3-Line To 8-Line Demultiplexers

The LSTTL/MSI SN54/74LS138 is a high speed 1-of-8 Decoder/Demultiplexer.

This device is ideally suited for high speed bipolar memorychip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three LS138 devices or to a 1-of-32decoder using four LS138s and one inverter. The DM74LS138 decodes one-of-eight lines, based uponthe conditions at the three binary select inputs and thethree enable inputs. Two active-low and one active-highenable inputs reduce the need for external gates or inverterswhen expanding. A 24-line decoder can be implementedwith no external inverters, and a 32-line decoderrequires only one inverter. An enable input can be used asa data input for demultiplexing applications.The DM74LS139 comprises two separate two-line-to-fourlinedecoders in a single package. The active-low enableinput can be used as a data line in demultiplexing application.The LS138 is fabricated with theSchottky barrier diode process for high speed and is completely compatiblewith all Motorola TTL families.

• Demultiplexing Capability
  
• Multiple Input Enable for Easy Expansion
  
• Typical Power Dissipation of 32 mW
  
• Active Low Mutually Exclusive Outputs
  
• Input Clamp Diodes Limit High Speed Termination Effects

We have Various sizes of 7400 Series IC. Check out our complete collection of 7400 Series IC.

Features Of 74138 3-Line To 8-Line Demultiplexers

• Designed specifically for high speed:Memory decodersData transmission systems
  
• DM74LS138 3-to-8-line decoders incorporates 3 enableinputs to simplify cascading and/or data reception
  
• Schottky clamped for high performance
  
• Typical propagation delay (3 levels of logic)DM74LS138 21 ns 
  
• Typical power dissipationDM74LS138 32 mW 
• Active Low Mutually Exclusive Outputs
• Input Clamp Diodes Limit High Speed Termination Effects